For proper execution of the RESim scripts, ensure the included files are in the correct locations defined on the setup page.

  1. Edit RESim.py to change the FILE_NAME and TOP_MODULE constants for the netlist being analyzed. (Exclude '.v' extension)
  2. Place the netlist file in the Netlist folder.
  3. Execute RESim.py
  4. A prompt will appear asking if simulation results are done. Before entering 'yes', run the simulations using the modified netlist and test-bench found in the Output folder. The test-bench is a template so it will need to be modified manually to define the input signals for each clock cycle. Once simulation is complete, copy the results file created into the RESim directory then enter 'yes' into the command line. *Note: Confirm proper names of new output wires in modified netlist; flattened netlists tend to use '/', '\', ' ' (space) in names so it will need to be corrected manually for the assign statements at the end of the top module.
  5. Resim will finish the rest of the automation and produce output files in the Output folder. The final results will be in the file ending with _RESim_Results.txt. The two files with _Common_Solutions.txt and _Solution_Results.txt contain the common solutions found with the SAT solver and the resulting simplified expressions respectively.